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2 Commits
90cd2273f1
...
02517fe9ae
| Author | SHA1 | Date | |
|---|---|---|---|
| 02517fe9ae | |||
| c9d0ff0686 |
@@ -59,7 +59,6 @@ void Error_Handler(void);
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/* Private defines -----------------------------------------------------------*/
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#define IMU_DRDY_Pin GPIO_PIN_3
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#define IMU_DRDY_GPIO_Port GPIOC
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#define IMU_DRDY_EXTI_IRQn EXTI3_IRQn
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#define CLKIN_ADC_Pin GPIO_PIN_0
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#define CLKIN_ADC_GPIO_Port GPIOA
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#define ADC_CS_Pin GPIO_PIN_3
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@@ -84,7 +83,6 @@ void Error_Handler(void);
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#define LED3_GPIO_Port GPIOB
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#define PPG_DRDY_Pin GPIO_PIN_7
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#define PPG_DRDY_GPIO_Port GPIOC
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#define PPG_DRDY_EXTI_IRQn EXTI9_5_IRQn
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#define SD_DETECT_Pin GPIO_PIN_15
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#define SD_DETECT_GPIO_Port GPIOA
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@@ -0,0 +1,5 @@
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#include "i2c.h"
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void initialize_max30101(I2C_HandleTypeDef *hi2c1);
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void read_max30101(I2C_HandleTypeDef *hi2c1);
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@@ -25,43 +25,26 @@ struct packet_vbatt {
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struct packet_imu {
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uint32_t t;
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uint16_t readings_cnts[4];
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uint8_t data[141];
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};
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struct packet_ekg {
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struct packet_adc {
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uint32_t t;
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uint8_t index;
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int32_t readings_cnts[50];
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};
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struct packet_strain {
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uint32_t t;
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uint8_t index;
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int32_t readings_cnts[5];
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};
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struct packet_outsideT {
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uint32_t t;
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uint8_t index;
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int32_t readings_cnts[5];
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};
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struct packet_insideT {
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uint32_t t;
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uint8_t index;
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int32_t readings_cnts[5];
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};
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struct packet_button {
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uint32_t t;
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uint8_t button_vec;
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int32_t ekg_readings_cnts[50];
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int32_t str_readings_cnts[5];
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int32_t oT_readings_cnts[5];
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int32_t iT_readings_cnts[5];
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};
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struct packet_spo2 {
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uint32_t t;
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uint32_t green_cnts[25];
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uint32_t red_cnts[25];
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uint32_t ir_cnts[25];
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uint8_t bytes[180];
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};
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struct packet_msg {
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uint32_t t;
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char buff[32];
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};
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template<typename T>
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@@ -80,36 +63,21 @@ __inline__ uint8_t typecode<struct packet_vbatt>() {
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}
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template<>
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__inline__ uint8_t typecode<struct packet_ekg>() {
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__inline__ uint8_t typecode<struct packet_imu>() {
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return 3;
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}
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template<>
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__inline__ uint8_t typecode<struct packet_strain>() {
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__inline__ uint8_t typecode<struct packet_adc>() {
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return 4;
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}
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template<>
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__inline__ uint8_t typecode<struct packet_outsideT>() {
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__inline__ uint8_t typecode<struct packet_spo2>() {
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return 5;
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}
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template<>
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__inline__ uint8_t typecode<struct packet_insideT>() {
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__inline__ uint8_t typecode<struct packet_msg>() {
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return 6;
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}
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template<>
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__inline__ uint8_t typecode<struct packet_button>() {
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return 7;
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}
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template<>
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__inline__ uint8_t typecode<struct packet_spo2>() {
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return 8;
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}
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template<>
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__inline__ uint8_t typecode<struct packet_imu>() {
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return 9;
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}
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@@ -56,9 +56,10 @@ void DebugMon_Handler(void);
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void PendSV_Handler(void);
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void SysTick_Handler(void);
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void EXTI0_IRQHandler(void);
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void EXTI3_IRQHandler(void);
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void DMA1_Channel4_IRQHandler(void);
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void DMA1_Channel5_IRQHandler(void);
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void DMA1_Channel6_IRQHandler(void);
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void DMA1_Channel7_IRQHandler(void);
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void ADC1_IRQHandler(void);
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void EXTI9_5_IRQHandler(void);
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void I2C1_EV_IRQHandler(void);
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@@ -67,7 +68,6 @@ void USART1_IRQHandler(void);
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void SDMMC1_IRQHandler(void);
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void TIM6_DAC_IRQHandler(void);
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void DMA2_Channel4_IRQHandler(void);
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void DMA2_Channel5_IRQHandler(void);
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void USB_IRQHandler(void);
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/* USER CODE BEGIN EFP */
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@@ -18,7 +18,7 @@ void initialize_ads131(SPI_HandleTypeDef *hspi1) {
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HAL_GPIO_WritePin(GPIOA, ADC_CS_Pin, GPIO_PIN_RESET);
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HAL_SPI_TransmitReceive(hspi1, (uint8_t*) cmd, (uint8_t*) rx_buff, 18, HAL_MAX_DELAY);
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HAL_GPIO_WritePin(GPIOA, ADC_CS_Pin, GPIO_PIN_SET);
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HAL_Delay(1);
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HAL_Delay(2);
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// set OSR, reg 3h
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cmd[0] = 0b01100001;
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@@ -32,11 +32,11 @@ void initialize_ads131(SPI_HandleTypeDef *hspi1) {
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HAL_GPIO_WritePin(GPIOA, ADC_CS_Pin, GPIO_PIN_RESET);
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HAL_SPI_TransmitReceive(hspi1, (uint8_t*) cmd, (uint8_t*) rx_buff, 18, HAL_MAX_DELAY);
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HAL_GPIO_WritePin(GPIOA, ADC_CS_Pin, GPIO_PIN_SET);
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HAL_Delay(1);
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HAL_Delay(2);
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memset(cmd, 0, 6);
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// set gain to 8, reg 4h
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// set gain to 1, reg 4h
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cmd[0] = 0b01100010;
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cmd[1] = 0b00000000;
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cmd[2] = 0x00;
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@@ -48,7 +48,7 @@ void initialize_ads131(SPI_HandleTypeDef *hspi1) {
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HAL_GPIO_WritePin(GPIOA, ADC_CS_Pin, GPIO_PIN_RESET);
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HAL_SPI_TransmitReceive(hspi1, (uint8_t*) cmd, (uint8_t*) rx_buff, 18, HAL_MAX_DELAY);
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HAL_GPIO_WritePin(GPIOA, ADC_CS_Pin, GPIO_PIN_SET);
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HAL_Delay(1);
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HAL_Delay(2);
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memset(cmd, 0, 6);
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@@ -60,10 +60,7 @@ void initialize_ads131(SPI_HandleTypeDef *hspi1) {
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}
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}
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struct packet_ekg p_ekg;
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struct packet_strain p_strain;
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struct packet_outsideT p_outsideT;
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struct packet_insideT p_insideT;
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struct packet_adc p_adc;
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extern volatile uint16_t tim6_reloads;
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@@ -83,58 +80,23 @@ void read_ads131(SPI_HandleTypeDef *hspi1) {
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HAL_GPIO_WritePin(GPIOA, ADC_CS_Pin, GPIO_PIN_RESET);
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HAL_SPI_TransmitReceive(hspi1, (uint8_t*) cmd, (uint8_t*) rx_buff, 18, HAL_MAX_DELAY);
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HAL_GPIO_WritePin(GPIOA, ADC_CS_Pin, GPIO_PIN_SET);
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// WARNING AVERAGING LATER PROBABLY WON'T WORK - 2s COMPLEMENT!!!
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//--------------
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if (p_ekg.index == 0) {
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p_ekg.t = ((uint32_t)tim6_reloads) * (htim6.Init.Period + 1) + TIM6->CNT;
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if (p_adc.index == 0) {
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p_adc.t = ((uint32_t)tim6_reloads) * (htim6.Init.Period + 1) + TIM6->CNT;
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}
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p_ekg.readings_cnts[p_ekg.index] = to_signed_24(&rx_buff[3]);
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if (p_ekg.index == 49) {
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write(p_ekg);
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p_ekg.index = 0;
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p_adc.ekg_readings_cnts[p_adc.index] = to_signed_24(&rx_buff[3]);
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p_adc.str_readings_cnts[p_adc.index / 10] += to_signed_24(&rx_buff[6]);
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p_adc.oT_readings_cnts[p_adc.index / 10] += to_signed_24(&rx_buff[9]);
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p_adc.iT_readings_cnts[p_adc.index / 10] += to_signed_24(&rx_buff[12]);
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if (p_adc.index == 49) {
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write(p_adc);
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p_adc.index = 0;
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memset(p_adc.str_readings_cnts, 0, sizeof(p_adc.str_readings_cnts));
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memset(p_adc.oT_readings_cnts, 0, sizeof(p_adc.oT_readings_cnts));
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memset(p_adc.iT_readings_cnts, 0, sizeof(p_adc.iT_readings_cnts));
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} else {
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p_ekg.index++;
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p_adc.index++;
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}
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//-------------
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if (p_strain.index == 0) {
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p_strain.t = ((uint32_t)tim6_reloads) * (htim6.Init.Period + 1) + TIM6->CNT;
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}
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p_strain.readings_cnts[p_strain.index / 10] += to_signed_24(&rx_buff[6]);
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if (p_strain.index == 49) {
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write(p_strain);
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p_strain.index = 0;
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memset(p_strain.readings_cnts, 0, sizeof(p_strain.readings_cnts));
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} else {
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p_strain.index++;
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}
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//-------------
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if (p_outsideT.index == 0) {
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p_outsideT.t = ((uint32_t)tim6_reloads) * (htim6.Init.Period + 1) + TIM6->CNT;
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}
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p_outsideT.readings_cnts[p_outsideT.index / 10] += to_signed_24(&rx_buff[9]);
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if (p_outsideT.index == 49) {
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write(p_outsideT);
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p_outsideT.index = 0;
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memset(p_outsideT.readings_cnts, 0, sizeof(p_outsideT.readings_cnts));
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} else {
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p_outsideT.index++;
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}
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//-------------
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if (p_insideT.index == 0) {
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p_insideT.t = ((uint32_t)tim6_reloads) * (htim6.Init.Period + 1) + TIM6->CNT;
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}
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p_insideT.readings_cnts[p_insideT.index / 10] += to_signed_24(&rx_buff[12]);
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if (p_insideT.index == 49) {
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write(p_insideT);
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p_insideT.index = 0;
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memset(p_insideT.readings_cnts, 0, sizeof(p_insideT.readings_cnts));
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} else {
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p_insideT.index++;
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}
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//-------------
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}
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@@ -1,6 +1,6 @@
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//#include "buff.hpp"
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#include <cstdint>
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uint8_t databank1[1024];
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uint8_t databank2[1024];
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alignas(32) uint8_t databank1[1024];
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alignas(32) uint8_t databank2[1024];
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uint16_t pos = 0;
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@@ -21,37 +21,22 @@ void data_description(bool to_usb, bool to_file) {
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if (to_usb) {CDC_Transmit_FS((uint8_t*)buff, cx);}
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HAL_Delay(50);
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cx = snprintf(buff, sizeof(buff), "%s %d %d %s %d %d %s %d %d\n\r", "packet_imu", typecode<packet_imu>(), sizeof(packet_imu), "uint32_t t", offsetof(packet_imu, t), sizeof(uint32_t), "uint16_t readings_cnts[4]", offsetof(packet_imu, readings_cnts), sizeof(uint16_t));
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cx = snprintf(buff, sizeof(buff), "%s %d %d %s %d %d %s %d %d\n\r", "packet_imu", typecode<packet_imu>(), sizeof(packet_imu), "uint32_t t", offsetof(packet_imu, t), sizeof(uint32_t), "uint8_t data[141]", offsetof(packet_imu, data), sizeof(uint8_t));
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if (to_file) {unsigned int bw; f_write(&file, buff, cx, &bw);}
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if (to_usb) {CDC_Transmit_FS((uint8_t*)buff, cx);}
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HAL_Delay(50);
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cx = snprintf(buff, sizeof(buff), "%s %d %d %s %d %d %s %d %d %s %d %d\n\r", "packet_ekg", typecode<packet_ekg>(), sizeof(packet_ekg), "uint32_t t", offsetof(packet_ekg, t), sizeof(uint32_t), "uint8_t index", offsetof(packet_ekg, index), sizeof(uint8_t), "int32_t readings_cnts[50]", offsetof(packet_ekg, readings_cnts), sizeof(int32_t));
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cx = snprintf(buff, sizeof(buff), "%s %d %d %s %d %d %s %d %d %s %d %d %s %d %d %s %d %d %s %d %d\n\r", "packet_adc", typecode<packet_adc>(), sizeof(packet_adc), "uint32_t t", offsetof(packet_adc, t), sizeof(uint32_t), "uint8_t index", offsetof(packet_adc, index), sizeof(uint8_t), "int32_t ekg_readings_cnts[50]", offsetof(packet_adc, ekg_readings_cnts), sizeof(int32_t), "int32_t str_readings_cnts[5]", offsetof(packet_adc, str_readings_cnts), sizeof(int32_t), "int32_t oT_readings_cnts[5]", offsetof(packet_adc, oT_readings_cnts), sizeof(int32_t), "int32_t iT_readings_cnts[5]", offsetof(packet_adc, iT_readings_cnts), sizeof(int32_t));
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if (to_file) {unsigned int bw; f_write(&file, buff, cx, &bw);}
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if (to_usb) {CDC_Transmit_FS((uint8_t*)buff, cx);}
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HAL_Delay(50);
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cx = snprintf(buff, sizeof(buff), "%s %d %d %s %d %d %s %d %d %s %d %d\n\r", "packet_strain", typecode<packet_strain>(), sizeof(packet_strain), "uint32_t t", offsetof(packet_strain, t), sizeof(uint32_t), "uint8_t index", offsetof(packet_strain, index), sizeof(uint8_t), "int32_t readings_cnts[5]", offsetof(packet_strain, readings_cnts), sizeof(int32_t));
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cx = snprintf(buff, sizeof(buff), "%s %d %d %s %d %d %s %d %d\n\r", "packet_spo2", typecode<packet_spo2>(), sizeof(packet_spo2), "uint32_t t", offsetof(packet_spo2, t), sizeof(uint32_t), "uint8_t bytes[180]", offsetof(packet_spo2, bytes), sizeof(uint8_t));
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if (to_file) {unsigned int bw; f_write(&file, buff, cx, &bw);}
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if (to_usb) {CDC_Transmit_FS((uint8_t*)buff, cx);}
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HAL_Delay(50);
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cx = snprintf(buff, sizeof(buff), "%s %d %d %s %d %d %s %d %d %s %d %d\n\r", "packet_outsideT", typecode<packet_outsideT>(), sizeof(packet_outsideT), "uint32_t t", offsetof(packet_outsideT, t), sizeof(uint32_t), "uint8_t index", offsetof(packet_outsideT, index), sizeof(uint8_t), "int32_t readings_cnts[5]", offsetof(packet_outsideT, readings_cnts), sizeof(int32_t));
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if (to_file) {unsigned int bw; f_write(&file, buff, cx, &bw);}
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if (to_usb) {CDC_Transmit_FS((uint8_t*)buff, cx);}
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HAL_Delay(50);
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cx = snprintf(buff, sizeof(buff), "%s %d %d %s %d %d %s %d %d %s %d %d\n\r", "packet_insideT", typecode<packet_insideT>(), sizeof(packet_insideT), "uint32_t t", offsetof(packet_insideT, t), sizeof(uint32_t), "uint8_t index", offsetof(packet_insideT, index), sizeof(uint8_t), "int32_t readings_cnts[5]", offsetof(packet_insideT, readings_cnts), sizeof(int32_t));
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if (to_file) {unsigned int bw; f_write(&file, buff, cx, &bw);}
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if (to_usb) {CDC_Transmit_FS((uint8_t*)buff, cx);}
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HAL_Delay(50);
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cx = snprintf(buff, sizeof(buff), "%s %d %d %s %d %d %s %d %d\n\r", "packet_button", typecode<packet_button>(), sizeof(packet_button), "uint32_t t", offsetof(packet_button, t), sizeof(uint32_t), "uint8_t button_vec", offsetof(packet_button, button_vec), sizeof(uint8_t));
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if (to_file) {unsigned int bw; f_write(&file, buff, cx, &bw);}
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if (to_usb) {CDC_Transmit_FS((uint8_t*)buff, cx);}
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HAL_Delay(50);
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cx = snprintf(buff, sizeof(buff), "%s %d %d %s %d %d %s %d %d %s %d %d %s %d %d\n\r", "packet_spo2", typecode<packet_spo2>(), sizeof(packet_spo2), "uint32_t t", offsetof(packet_spo2, t), sizeof(uint32_t), "uint32_t green_cnts[25]", offsetof(packet_spo2, green_cnts), sizeof(uint32_t), "uint32_t red_cnts[25]", offsetof(packet_spo2, red_cnts), sizeof(uint32_t), "uint32_t ir_cnts[25]", offsetof(packet_spo2, ir_cnts), sizeof(uint32_t));
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cx = snprintf(buff, sizeof(buff), "%s %d %d %s %d %d %s %d %d\n\r", "packet_msg", typecode<packet_msg>(), sizeof(packet_msg), "uint32_t t", offsetof(packet_msg, t), sizeof(uint32_t), "char buff[32]", offsetof(packet_msg, buff), sizeof(char));
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if (to_file) {unsigned int bw; f_write(&file, buff, cx, &bw);}
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if (to_usb) {CDC_Transmit_FS((uint8_t*)buff, cx);}
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HAL_Delay(50);
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@@ -50,12 +50,15 @@ void MX_DMA_Init(void)
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/* DMA1_Channel5_IRQn interrupt configuration */
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HAL_NVIC_SetPriority(DMA1_Channel5_IRQn, 0, 0);
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HAL_NVIC_EnableIRQ(DMA1_Channel5_IRQn);
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/* DMA1_Channel6_IRQn interrupt configuration */
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HAL_NVIC_SetPriority(DMA1_Channel6_IRQn, 0, 0);
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HAL_NVIC_EnableIRQ(DMA1_Channel6_IRQn);
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/* DMA1_Channel7_IRQn interrupt configuration */
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HAL_NVIC_SetPriority(DMA1_Channel7_IRQn, 0, 0);
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HAL_NVIC_EnableIRQ(DMA1_Channel7_IRQn);
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/* DMA2_Channel4_IRQn interrupt configuration */
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HAL_NVIC_SetPriority(DMA2_Channel4_IRQn, 0, 0);
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HAL_NVIC_EnableIRQ(DMA2_Channel4_IRQn);
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/* DMA2_Channel5_IRQn interrupt configuration */
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HAL_NVIC_SetPriority(DMA2_Channel5_IRQn, 0, 0);
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HAL_NVIC_EnableIRQ(DMA2_Channel5_IRQn);
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}
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@@ -59,9 +59,9 @@ void MX_GPIO_Init(void)
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/*Configure GPIO pin Output Level */
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HAL_GPIO_WritePin(GPIOB, LED1_Pin|LED2_Pin|LED3_Pin, GPIO_PIN_SET);
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/*Configure GPIO pins : IMU_DRDY_Pin PPG_DRDY_Pin */
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GPIO_InitStruct.Pin = IMU_DRDY_Pin|PPG_DRDY_Pin;
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GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING;
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/*Configure GPIO pins : IMU_DRDY_Pin BUTTON2_Pin */
|
||||
GPIO_InitStruct.Pin = IMU_DRDY_Pin|BUTTON2_Pin;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
|
||||
|
||||
@@ -85,12 +85,6 @@ void MX_GPIO_Init(void)
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
HAL_GPIO_Init(IMU_CS_GPIO_Port, &GPIO_InitStruct);
|
||||
|
||||
/*Configure GPIO pin : BUTTON2_Pin */
|
||||
GPIO_InitStruct.Pin = BUTTON2_Pin;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
HAL_GPIO_Init(BUTTON2_GPIO_Port, &GPIO_InitStruct);
|
||||
|
||||
/*Configure GPIO pin : BUTTON1_Pin */
|
||||
GPIO_InitStruct.Pin = BUTTON1_Pin;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING;
|
||||
@@ -104,6 +98,12 @@ void MX_GPIO_Init(void)
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||
|
||||
/*Configure GPIO pin : PPG_DRDY_Pin */
|
||||
GPIO_InitStruct.Pin = PPG_DRDY_Pin;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
||||
GPIO_InitStruct.Pull = GPIO_PULLUP;
|
||||
HAL_GPIO_Init(PPG_DRDY_GPIO_Port, &GPIO_InitStruct);
|
||||
|
||||
/*Configure GPIO pin : SD_DETECT_Pin */
|
||||
GPIO_InitStruct.Pin = SD_DETECT_Pin;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
||||
@@ -114,9 +114,6 @@ void MX_GPIO_Init(void)
|
||||
HAL_NVIC_SetPriority(EXTI0_IRQn, 0, 0);
|
||||
HAL_NVIC_EnableIRQ(EXTI0_IRQn);
|
||||
|
||||
HAL_NVIC_SetPriority(EXTI3_IRQn, 0, 0);
|
||||
HAL_NVIC_EnableIRQ(EXTI3_IRQn);
|
||||
|
||||
HAL_NVIC_SetPriority(EXTI9_5_IRQn, 0, 0);
|
||||
HAL_NVIC_EnableIRQ(EXTI9_5_IRQn);
|
||||
|
||||
|
||||
@@ -25,6 +25,8 @@
|
||||
/* USER CODE END 0 */
|
||||
|
||||
I2C_HandleTypeDef hi2c1;
|
||||
DMA_HandleTypeDef hdma_i2c1_rx;
|
||||
DMA_HandleTypeDef hdma_i2c1_tx;
|
||||
|
||||
/* I2C1 init function */
|
||||
void MX_I2C1_Init(void)
|
||||
@@ -38,7 +40,7 @@ void MX_I2C1_Init(void)
|
||||
|
||||
/* USER CODE END I2C1_Init 1 */
|
||||
hi2c1.Instance = I2C1;
|
||||
hi2c1.Init.Timing = 0x10D19CE4;
|
||||
hi2c1.Init.Timing = 0x00F12981;
|
||||
hi2c1.Init.OwnAddress1 = 0;
|
||||
hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
|
||||
hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
|
||||
@@ -105,6 +107,41 @@ void HAL_I2C_MspInit(I2C_HandleTypeDef* i2cHandle)
|
||||
/* I2C1 clock enable */
|
||||
__HAL_RCC_I2C1_CLK_ENABLE();
|
||||
|
||||
/* I2C1 DMA Init */
|
||||
/* I2C1_RX Init */
|
||||
hdma_i2c1_rx.Instance = DMA1_Channel7;
|
||||
hdma_i2c1_rx.Init.Request = DMA_REQUEST_3;
|
||||
hdma_i2c1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
|
||||
hdma_i2c1_rx.Init.PeriphInc = DMA_PINC_DISABLE;
|
||||
hdma_i2c1_rx.Init.MemInc = DMA_MINC_ENABLE;
|
||||
hdma_i2c1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
|
||||
hdma_i2c1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
|
||||
hdma_i2c1_rx.Init.Mode = DMA_NORMAL;
|
||||
hdma_i2c1_rx.Init.Priority = DMA_PRIORITY_LOW;
|
||||
if (HAL_DMA_Init(&hdma_i2c1_rx) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
__HAL_LINKDMA(i2cHandle,hdmarx,hdma_i2c1_rx);
|
||||
|
||||
/* I2C1_TX Init */
|
||||
hdma_i2c1_tx.Instance = DMA1_Channel6;
|
||||
hdma_i2c1_tx.Init.Request = DMA_REQUEST_3;
|
||||
hdma_i2c1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
|
||||
hdma_i2c1_tx.Init.PeriphInc = DMA_PINC_DISABLE;
|
||||
hdma_i2c1_tx.Init.MemInc = DMA_MINC_ENABLE;
|
||||
hdma_i2c1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
|
||||
hdma_i2c1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
|
||||
hdma_i2c1_tx.Init.Mode = DMA_NORMAL;
|
||||
hdma_i2c1_tx.Init.Priority = DMA_PRIORITY_LOW;
|
||||
if (HAL_DMA_Init(&hdma_i2c1_tx) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
__HAL_LINKDMA(i2cHandle,hdmatx,hdma_i2c1_tx);
|
||||
|
||||
/* I2C1 interrupt Init */
|
||||
HAL_NVIC_SetPriority(I2C1_EV_IRQn, 0, 0);
|
||||
HAL_NVIC_EnableIRQ(I2C1_EV_IRQn);
|
||||
@@ -133,6 +170,10 @@ void HAL_I2C_MspDeInit(I2C_HandleTypeDef* i2cHandle)
|
||||
|
||||
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_10);
|
||||
|
||||
/* I2C1 DMA DeInit */
|
||||
HAL_DMA_DeInit(i2cHandle->hdmarx);
|
||||
HAL_DMA_DeInit(i2cHandle->hdmatx);
|
||||
|
||||
/* I2C1 interrupt Deinit */
|
||||
HAL_NVIC_DisableIRQ(I2C1_EV_IRQn);
|
||||
/* USER CODE BEGIN I2C1_MspDeInit 1 */
|
||||
|
||||
@@ -15,98 +15,90 @@ void initialize_lsm6dsv(SPI_HandleTypeDef *hspi1) {
|
||||
hspi1->Init.CLKPolarity = SPI_POLARITY_HIGH;
|
||||
HAL_SPI_Init(hspi1);
|
||||
|
||||
// Reset
|
||||
tx_buff[0] = 0x01;
|
||||
tx_buff[0] = 0x01; // Reset
|
||||
tx_buff[1] = 0x04;
|
||||
HAL_GPIO_WritePin(GPIOC, IMU_CS_Pin, GPIO_PIN_RESET);
|
||||
HAL_SPI_TransmitReceive(hspi1, tx_buff, rx_buff, 2, HAL_MAX_DELAY);
|
||||
HAL_GPIO_WritePin(GPIOC, IMU_CS_Pin, GPIO_PIN_SET);
|
||||
HAL_Delay(1);
|
||||
HAL_Delay(30);
|
||||
|
||||
tx_buff[0] = 0x09; // Set 7.5Hz data rate for fifo
|
||||
tx_buff[1] = 0b00100010;
|
||||
tx_buff[0] = 0x03; // active high pushpull interrupt
|
||||
tx_buff[1] = 0x01; // I2C and I3C disabled
|
||||
HAL_GPIO_WritePin(GPIOC, IMU_CS_Pin, GPIO_PIN_RESET);
|
||||
HAL_SPI_TransmitReceive(hspi1, tx_buff, rx_buff, 2, HAL_MAX_DELAY);
|
||||
HAL_GPIO_WritePin(GPIOC, IMU_CS_Pin, GPIO_PIN_SET);
|
||||
|
||||
tx_buff[0] = 0x0A; // Set continuous mode for fifo
|
||||
tx_buff[1] = 0b00000110;
|
||||
HAL_Delay(30);
|
||||
|
||||
tx_buff[0] = 0x09; // Set 60Hz data rate for fifo
|
||||
tx_buff[1] = 0b01010101;
|
||||
HAL_GPIO_WritePin(GPIOC, IMU_CS_Pin, GPIO_PIN_RESET);
|
||||
HAL_SPI_TransmitReceive(hspi1, tx_buff, rx_buff, 2, HAL_MAX_DELAY);
|
||||
HAL_GPIO_WritePin(GPIOC, IMU_CS_Pin, GPIO_PIN_SET);
|
||||
HAL_Delay(30);
|
||||
|
||||
tx_buff[0] = 0x0D; // Set drdy based on fifo
|
||||
tx_buff[1] = 0b00111000;
|
||||
HAL_GPIO_WritePin(GPIOC, IMU_CS_Pin, GPIO_PIN_RESET);
|
||||
HAL_SPI_TransmitReceive(hspi1, tx_buff, rx_buff, 2, HAL_MAX_DELAY);
|
||||
HAL_GPIO_WritePin(GPIOC, IMU_CS_Pin, GPIO_PIN_SET);
|
||||
HAL_Delay(30);
|
||||
|
||||
tx_buff[0] = 0x10; // Set 7.5Hz accelerometer high performance
|
||||
tx_buff[1] = 0b00000010;
|
||||
tx_buff[0] = 0x10; // Set 60Hz accelerometer high performance
|
||||
tx_buff[1] = 0b00000101;
|
||||
HAL_GPIO_WritePin(GPIOC, IMU_CS_Pin, GPIO_PIN_RESET);
|
||||
HAL_SPI_TransmitReceive(hspi1, tx_buff, rx_buff, 2, HAL_MAX_DELAY);
|
||||
HAL_GPIO_WritePin(GPIOC, IMU_CS_Pin, GPIO_PIN_SET);
|
||||
HAL_Delay(30);
|
||||
|
||||
tx_buff[0] = 0x11; // Set 7.5Hz gyro high performance
|
||||
tx_buff[1] = 0b00000010;
|
||||
tx_buff[0] = 0x11; // Set 60Hz gyro high performance
|
||||
tx_buff[1] = 0b00000101;
|
||||
HAL_GPIO_WritePin(GPIOC, IMU_CS_Pin, GPIO_PIN_RESET);
|
||||
HAL_SPI_TransmitReceive(hspi1, tx_buff, rx_buff, 2, HAL_MAX_DELAY);
|
||||
HAL_GPIO_WritePin(GPIOC, IMU_CS_Pin, GPIO_PIN_SET);
|
||||
HAL_Delay(30);
|
||||
|
||||
// todo: get watermark working
|
||||
tx_buff[0] = 0x07;
|
||||
tx_buff[1] = 0x07;
|
||||
tx_buff[1] = 21; // 21 samples
|
||||
HAL_GPIO_WritePin(GPIOC, IMU_CS_Pin, GPIO_PIN_RESET);
|
||||
HAL_SPI_TransmitReceive(hspi1, tx_buff, rx_buff, 2, HAL_MAX_DELAY);
|
||||
HAL_GPIO_WritePin(GPIOC, IMU_CS_Pin, GPIO_PIN_SET);
|
||||
HAL_Delay(30);
|
||||
|
||||
tx_buff[0] = 0x0A; // Set bypass mode for fifo
|
||||
tx_buff[1] = 0b00000000; // to clear fifo
|
||||
HAL_GPIO_WritePin(GPIOC, IMU_CS_Pin, GPIO_PIN_RESET);
|
||||
HAL_SPI_TransmitReceive(hspi1, tx_buff, rx_buff, 2, HAL_MAX_DELAY);
|
||||
HAL_GPIO_WritePin(GPIOC, IMU_CS_Pin, GPIO_PIN_SET);
|
||||
HAL_Delay(30);
|
||||
|
||||
tx_buff[0] = 0x0A; // Set continuous mode for fifo
|
||||
tx_buff[1] = 0b00000110;
|
||||
HAL_GPIO_WritePin(GPIOC, IMU_CS_Pin, GPIO_PIN_RESET);
|
||||
HAL_SPI_TransmitReceive(hspi1, tx_buff, rx_buff, 2, HAL_MAX_DELAY);
|
||||
HAL_GPIO_WritePin(GPIOC, IMU_CS_Pin, GPIO_PIN_SET);
|
||||
HAL_Delay(30);
|
||||
}
|
||||
|
||||
struct packet_imu p_imu;
|
||||
|
||||
void read_lsm6dsv(SPI_HandleTypeDef *hspi1) {
|
||||
|
||||
if (HAL_GPIO_ReadPin(GPIOC, IMU_DRDY_Pin) != GPIO_PIN_RESET) {
|
||||
if (HAL_GPIO_ReadPin(GPIOC, IMU_DRDY_Pin) == GPIO_PIN_RESET) {
|
||||
return;
|
||||
}
|
||||
|
||||
//CDC_Transmit_FS((uint8_t*) "Detected\n\r", 10);
|
||||
|
||||
uint8_t tx_buff[8] = {0};
|
||||
uint8_t rx_buff[8] = {0};
|
||||
|
||||
HAL_SPI_DeInit(hspi1);
|
||||
hspi1->Init.CLKPolarity = SPI_POLARITY_HIGH;
|
||||
HAL_SPI_Init(hspi1);
|
||||
|
||||
tx_buff[0] = 0b10000000 + 0x1B;
|
||||
tx_buff[1] = 0;
|
||||
HAL_GPIO_WritePin(GPIOC, IMU_CS_Pin, GPIO_PIN_RESET);
|
||||
HAL_SPI_TransmitReceive(hspi1, tx_buff, rx_buff, 3, HAL_MAX_DELAY);
|
||||
HAL_GPIO_WritePin(GPIOC, IMU_CS_Pin, GPIO_PIN_SET);
|
||||
|
||||
// todo: read in batches
|
||||
if (rx_buff[1] != 0) {
|
||||
tx_buff[0] = 0b10000000 + 0x78; // FIFO addr
|
||||
tx_buff[1] = 0;
|
||||
HAL_GPIO_WritePin(GPIOC, IMU_CS_Pin, GPIO_PIN_RESET);
|
||||
HAL_SPI_TransmitReceive(hspi1, tx_buff, rx_buff, 8, HAL_MAX_DELAY);
|
||||
HAL_GPIO_WritePin(GPIOC, IMU_CS_Pin, GPIO_PIN_SET);
|
||||
uint8_t tx_buff[141] = {0b10000000 + 0x78}; // FIFO addr
|
||||
|
||||
// cx = snprintf(buffer, 64, "%02x %02x %02x %02x %02x %02x %02x %02x\n\r",
|
||||
// rx_buff[0],
|
||||
// rx_buff[1],
|
||||
// rx_buff[2],
|
||||
// rx_buff[3],
|
||||
// rx_buff[4],
|
||||
// rx_buff[5],
|
||||
// rx_buff[6],
|
||||
// rx_buff[7]);
|
||||
// CDC_Transmit_FS((uint8_t*)buffer, cx);
|
||||
p_imu.t = ((uint32_t)tim6_reloads) * (htim6.Init.Period + 1) + TIM6->CNT;
|
||||
p_imu.readings_cnts[0] = rx_buff[1];
|
||||
p_imu.readings_cnts[1] = ((uint16_t)rx_buff[2] << 8) + rx_buff[3];
|
||||
p_imu.readings_cnts[2] = ((uint16_t)rx_buff[4] << 8) + rx_buff[5];
|
||||
p_imu.readings_cnts[3] = ((uint16_t)rx_buff[6] << 8) + rx_buff[7];
|
||||
write(p_imu);
|
||||
}
|
||||
// Watermark set for 21 samples, read 20
|
||||
tx_buff[0] = 0b10000000 + 0x78; // FIFO addr
|
||||
p_imu.t = ((uint32_t)tim6_reloads) * (htim6.Init.Period + 1) + TIM6->CNT;
|
||||
HAL_GPIO_WritePin(GPIOC, IMU_CS_Pin, GPIO_PIN_RESET);
|
||||
HAL_SPI_TransmitReceive(hspi1, tx_buff, p_imu.data, 141, HAL_MAX_DELAY);
|
||||
HAL_GPIO_WritePin(GPIOC, IMU_CS_Pin, GPIO_PIN_SET);
|
||||
write(p_imu);
|
||||
}
|
||||
|
||||
@@ -39,6 +39,7 @@
|
||||
#include "buff.hpp"
|
||||
#include "ads131.hpp"
|
||||
#include "lsm6dsv.hpp"
|
||||
#include "max30101.hpp"
|
||||
#include "datadescriptor.hpp"
|
||||
/* USER CODE END Includes */
|
||||
|
||||
@@ -125,7 +126,6 @@ void USB_CDC_RxHandler(uint8_t* Buf, uint32_t Len) {
|
||||
|
||||
void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart) {
|
||||
if (uart_rx_data[0] == 'R') {
|
||||
//HAL_GPIO_TogglePin(GPIOB, LED1_Pin | LED2_Pin | LED3_Pin);
|
||||
wb1mmc_ready = true;
|
||||
}
|
||||
HAL_UART_Receive_DMA(&huart1, uart_rx_data, sizeof(uart_rx_data));
|
||||
@@ -136,37 +136,25 @@ void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) {}
|
||||
void turn_on_sd(void) {
|
||||
to_turn_on_sd = false;
|
||||
if (BSP_SD_IsDetected() != SD_PRESENT) {
|
||||
CDC_Transmit_FS((uint8_t*)"SD NP\n\r", 7);
|
||||
return;
|
||||
}
|
||||
if (sd_ready) {
|
||||
CDC_Transmit_FS((uint8_t*)"SD RD\n\r", 7);
|
||||
return;
|
||||
}
|
||||
if ((BSP_SD_IsDetected() == SD_PRESENT) && (!sd_ready)) {
|
||||
CDC_Transmit_FS((uint8_t*)"HERE1\n\r", 7);
|
||||
res = f_mount(&fs, "", 1);
|
||||
if (res != FR_OK) {
|
||||
CDC_Transmit_FS((uint8_t*)"SD NOK1\n\r", 9);
|
||||
return;
|
||||
}
|
||||
CDC_Transmit_FS((uint8_t*)"HERE2\n\r", 7);
|
||||
alignas(32) char buffer1[32];
|
||||
alignas(32) char buffer2[32];
|
||||
int cx = snprintf(buffer1, 32, "%06lu.log", TIM6->CNT);
|
||||
cx = snprintf(buffer2, 32, "%s\n\r", buffer1);
|
||||
CDC_Transmit_FS((uint8_t*)buffer2, cx);
|
||||
int cx = snprintf(buffer1, 32, "%08lu.log", ((uint32_t)tim6_reloads) * (htim6.Init.Period + 1) + TIM6->CNT % 99999999);
|
||||
res = f_open(&file, buffer1, FA_WRITE | FA_CREATE_ALWAYS);
|
||||
if (res != FR_OK) {
|
||||
CDC_Transmit_FS((uint8_t*)"SD NOK2\n\r", 9);
|
||||
res = f_mount(NULL, "", 1);
|
||||
return;
|
||||
}
|
||||
CDC_Transmit_FS((uint8_t*)"SUCCESS\n\r", 9);
|
||||
unsigned int bw;
|
||||
res = f_write(&file, "HERE\n\r", 6, &bw);
|
||||
cx = snprintf(buffer2, 32, "%d %d\n\r", res, bw);
|
||||
CDC_Transmit_FS((uint8_t*)buffer2, cx);
|
||||
//data_description(false, true);
|
||||
data_description(false, true);
|
||||
sd_ready = true;
|
||||
}
|
||||
}
|
||||
@@ -177,7 +165,6 @@ void turn_off_sd(void) {
|
||||
f_sync(&file);
|
||||
f_close(&file);
|
||||
res = f_mount(NULL, "", 1);
|
||||
CDC_Transmit_FS((uint8_t*)"CLS\n\r", 7);
|
||||
sd_ready = false;
|
||||
}
|
||||
}
|
||||
@@ -217,7 +204,6 @@ int main(void)
|
||||
MX_GPIO_Init();
|
||||
MX_DMA_Init();
|
||||
MX_SDMMC1_SD_Init();
|
||||
MX_FATFS_Init();
|
||||
MX_RTC_Init();
|
||||
MX_I2C1_Init();
|
||||
MX_SPI1_Init();
|
||||
@@ -226,27 +212,35 @@ int main(void)
|
||||
MX_USART1_UART_Init();
|
||||
MX_TIM6_Init();
|
||||
MX_USB_DEVICE_Init();
|
||||
MX_FATFS_Init();
|
||||
/* USER CODE BEGIN 2 */
|
||||
|
||||
/* USER CODE END 2 */
|
||||
|
||||
/* Infinite loop */
|
||||
/* USER CODE BEGIN WHILE */
|
||||
HAL_TIM_Base_Start_IT(&htim6);
|
||||
HAL_UART_Receive_DMA(&huart1, uart_rx_data, sizeof(uart_rx_data));
|
||||
//HAL_UART_Receive_DMA(&huart1, uart_rx_data, sizeof(uart_rx_data));
|
||||
// For some reason initializing the ads131 first breaks the lsm6dsv gyro readings
|
||||
initialize_lsm6dsv(&hspi1);
|
||||
initialize_ads131(&hspi1);
|
||||
HAL_Delay(3000);
|
||||
//initialize_ads131(&hspi1);
|
||||
//initialize_max30101(&hi2c1);
|
||||
|
||||
while (1)
|
||||
{
|
||||
if (to_turn_on_sd) {
|
||||
turn_on_sd();
|
||||
}
|
||||
|
||||
if (to_turn_off_sd) {
|
||||
turn_off_sd();
|
||||
}
|
||||
read_lsm6dsv(&hspi1);
|
||||
//read_max30101(&hi2c1);
|
||||
//read_ads131(&hspi1);
|
||||
HAL_Delay(1);
|
||||
continue;
|
||||
// if (to_turn_on_sd) {
|
||||
// turn_on_sd();
|
||||
// }
|
||||
|
||||
// if (to_turn_off_sd) {
|
||||
// turn_off_sd();
|
||||
// }
|
||||
// continue;
|
||||
/* USER CODE END WHILE */
|
||||
|
||||
/* USER CODE BEGIN 3 */
|
||||
@@ -280,7 +274,6 @@ int main(void)
|
||||
|
||||
read_ads131(&hspi1);
|
||||
read_lsm6dsv(&hspi1);
|
||||
|
||||
// HAL_GPIO_WritePin(GPIOB, LED1_Pin|LED2_Pin|LED3_Pin, GPIO_PIN_SET);
|
||||
// HAL_Delay(100);
|
||||
// HAL_GPIO_WritePin(GPIOB, LED1_Pin|LED2_Pin|LED3_Pin, GPIO_PIN_RESET);
|
||||
|
||||
@@ -0,0 +1,75 @@
|
||||
#include "max30101.hpp"
|
||||
|
||||
#include <cstring>
|
||||
|
||||
#include "gpio.h"
|
||||
#include "tim.h"
|
||||
|
||||
#include "packet.hpp"
|
||||
#include "buff.hpp"
|
||||
|
||||
extern uint16_t tim6_reloads;
|
||||
struct packet_spo2 p_spo2;
|
||||
uint8_t data[4];
|
||||
|
||||
bool followup = false;
|
||||
bool print_ready = false;
|
||||
void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c1) {
|
||||
if (not followup) {
|
||||
print_ready = true;
|
||||
// Clear interrupt
|
||||
HAL_I2C_Mem_Read_DMA(hi2c1, 0xAE, 0x00, 1, data, 1);
|
||||
followup = true;
|
||||
} else {
|
||||
followup = false;
|
||||
}
|
||||
}
|
||||
|
||||
void initialize_max30101(I2C_HandleTypeDef *hi2c1) {
|
||||
data[0] = 0b01000111; // Reset
|
||||
HAL_I2C_Mem_Write(hi2c1, 0xAE, 0x09, 1, data, 1, HAL_MAX_DELAY);
|
||||
data[0] = 0b00000111; // Turn on all LEDs
|
||||
HAL_I2C_Mem_Write(hi2c1, 0xAE, 0x09, 1, data, 1, HAL_MAX_DELAY);
|
||||
data[0] = 0b00000011; //0.4mS pulse width
|
||||
HAL_I2C_Mem_Write(hi2c1, 0xAE, 0x0A, 1, data, 1, HAL_MAX_DELAY);
|
||||
|
||||
memset(data, 0x0F, 4); // Set power
|
||||
HAL_I2C_Mem_Write(hi2c1, 0xAE, 0x0C, 1, data, 4, HAL_MAX_DELAY);
|
||||
|
||||
data[0] = 0b00010010; // Time slots: RED, IR
|
||||
HAL_I2C_Mem_Write(hi2c1, 0xAE, 0x11, 1, data, 1, HAL_MAX_DELAY);
|
||||
data[0] = 0b00000011; // Time slots ctd: None, Green
|
||||
HAL_I2C_Mem_Write(hi2c1, 0xAE, 0x12, 1, data, 1, HAL_MAX_DELAY);
|
||||
|
||||
// No averaging, FIFO rollover, FIFO almost full @ 29 samples
|
||||
data[0] = 0b00010011;
|
||||
HAL_I2C_Mem_Write(hi2c1, 0xAE, 0x08, 1, data, 1, HAL_MAX_DELAY);
|
||||
|
||||
// Interrupt only on FIFO almost full
|
||||
data[0] = 0b10000000;
|
||||
HAL_I2C_Mem_Write(hi2c1, 0xAE, 0x02, 1, data, 1, HAL_MAX_DELAY);
|
||||
|
||||
// clear write and read ptrs
|
||||
data[0] = 0;
|
||||
HAL_I2C_Mem_Write(hi2c1, 0xAE, 0x04, 1, data, 1, HAL_MAX_DELAY);
|
||||
HAL_I2C_Mem_Write(hi2c1, 0xAE, 0x05, 1, data, 1, HAL_MAX_DELAY);
|
||||
HAL_I2C_Mem_Write(hi2c1, 0xAE, 0x06, 1, data, 1, HAL_MAX_DELAY);
|
||||
|
||||
// read once to start the thing
|
||||
HAL_I2C_Mem_Read(hi2c1, 0xAE, 0x07, 1, p_spo2.bytes, 180, HAL_MAX_DELAY);
|
||||
}
|
||||
|
||||
void read_max30101(I2C_HandleTypeDef *hi2c1) {
|
||||
if (print_ready) {
|
||||
p_spo2.t = ((uint32_t)tim6_reloads) * (htim6.Init.Period + 1) + TIM6->CNT;
|
||||
write(p_spo2);
|
||||
print_ready = false;
|
||||
}
|
||||
if (HAL_GPIO_ReadPin(GPIOC, PPG_DRDY_Pin) != GPIO_PIN_RESET) {
|
||||
return;
|
||||
}
|
||||
if (HAL_I2C_GetState(hi2c1) == HAL_I2C_STATE_READY) {
|
||||
HAL_I2C_Mem_Read_DMA(hi2c1, 0xAE, 0x07, 1, p_spo2.bytes, 180);
|
||||
print_ready = false;
|
||||
}
|
||||
}
|
||||
@@ -25,8 +25,7 @@
|
||||
/* USER CODE END 0 */
|
||||
|
||||
SD_HandleTypeDef hsd1;
|
||||
DMA_HandleTypeDef hdma_sdmmc1_rx;
|
||||
DMA_HandleTypeDef hdma_sdmmc1_tx;
|
||||
DMA_HandleTypeDef hdma_sdmmc1;
|
||||
|
||||
/* SDMMC1 init function */
|
||||
|
||||
@@ -46,7 +45,7 @@ void MX_SDMMC1_SD_Init(void)
|
||||
hsd1.Init.ClockPowerSave = SDMMC_CLOCK_POWER_SAVE_DISABLE;
|
||||
hsd1.Init.BusWide = SDMMC_BUS_WIDE_4B;
|
||||
hsd1.Init.HardwareFlowControl = SDMMC_HARDWARE_FLOW_CONTROL_DISABLE;
|
||||
hsd1.Init.ClockDiv = 0;
|
||||
hsd1.Init.ClockDiv = 6;
|
||||
/* USER CODE BEGIN SDMMC1_Init 2 */
|
||||
|
||||
/* USER CODE END SDMMC1_Init 2 */
|
||||
@@ -91,39 +90,27 @@ void HAL_SD_MspInit(SD_HandleTypeDef* sdHandle)
|
||||
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
|
||||
|
||||
/* SDMMC1 DMA Init */
|
||||
/* SDMMC1_RX Init */
|
||||
hdma_sdmmc1_rx.Instance = DMA2_Channel4;
|
||||
hdma_sdmmc1_rx.Init.Request = DMA_REQUEST_7;
|
||||
hdma_sdmmc1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
|
||||
hdma_sdmmc1_rx.Init.PeriphInc = DMA_PINC_DISABLE;
|
||||
hdma_sdmmc1_rx.Init.MemInc = DMA_MINC_ENABLE;
|
||||
hdma_sdmmc1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
|
||||
hdma_sdmmc1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
|
||||
hdma_sdmmc1_rx.Init.Mode = DMA_NORMAL;
|
||||
hdma_sdmmc1_rx.Init.Priority = DMA_PRIORITY_LOW;
|
||||
if (HAL_DMA_Init(&hdma_sdmmc1_rx) != HAL_OK)
|
||||
/* SDMMC1 Init */
|
||||
hdma_sdmmc1.Instance = DMA2_Channel4;
|
||||
hdma_sdmmc1.Init.Request = DMA_REQUEST_7;
|
||||
hdma_sdmmc1.Init.Direction = DMA_PERIPH_TO_MEMORY;
|
||||
hdma_sdmmc1.Init.PeriphInc = DMA_PINC_DISABLE;
|
||||
hdma_sdmmc1.Init.MemInc = DMA_MINC_ENABLE;
|
||||
hdma_sdmmc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
|
||||
hdma_sdmmc1.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
|
||||
hdma_sdmmc1.Init.Mode = DMA_NORMAL;
|
||||
hdma_sdmmc1.Init.Priority = DMA_PRIORITY_LOW;
|
||||
if (HAL_DMA_Init(&hdma_sdmmc1) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
__HAL_LINKDMA(sdHandle,hdmarx,hdma_sdmmc1_rx);
|
||||
|
||||
/* SDMMC1_TX Init */
|
||||
hdma_sdmmc1_tx.Instance = DMA2_Channel5;
|
||||
hdma_sdmmc1_tx.Init.Request = DMA_REQUEST_7;
|
||||
hdma_sdmmc1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
|
||||
hdma_sdmmc1_tx.Init.PeriphInc = DMA_PINC_DISABLE;
|
||||
hdma_sdmmc1_tx.Init.MemInc = DMA_MINC_ENABLE;
|
||||
hdma_sdmmc1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
|
||||
hdma_sdmmc1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
|
||||
hdma_sdmmc1_tx.Init.Mode = DMA_NORMAL;
|
||||
hdma_sdmmc1_tx.Init.Priority = DMA_PRIORITY_LOW;
|
||||
if (HAL_DMA_Init(&hdma_sdmmc1_tx) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
__HAL_LINKDMA(sdHandle,hdmatx,hdma_sdmmc1_tx);
|
||||
/* Several peripheral DMA handle pointers point to the same DMA handle.
|
||||
Be aware that there is only one channel to perform all the requested DMAs. */
|
||||
/* Be sure to change transfer direction before calling
|
||||
HAL_SD_ReadBlocks_DMA or HAL_SD_WriteBlocks_DMA. */
|
||||
__HAL_LINKDMA(sdHandle,hdmarx,hdma_sdmmc1);
|
||||
__HAL_LINKDMA(sdHandle,hdmatx,hdma_sdmmc1);
|
||||
|
||||
/* SDMMC1 interrupt Init */
|
||||
HAL_NVIC_SetPriority(SDMMC1_IRQn, 0, 0);
|
||||
|
||||
@@ -44,7 +44,7 @@ void MX_SPI1_Init(void)
|
||||
hspi1.Init.CLKPolarity = SPI_POLARITY_LOW;
|
||||
hspi1.Init.CLKPhase = SPI_PHASE_2EDGE;
|
||||
hspi1.Init.NSS = SPI_NSS_SOFT;
|
||||
hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_128;
|
||||
hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_64;
|
||||
hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
|
||||
hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
|
||||
hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
|
||||
|
||||
@@ -57,9 +57,10 @@
|
||||
/* External variables --------------------------------------------------------*/
|
||||
extern PCD_HandleTypeDef hpcd_USB_FS;
|
||||
extern ADC_HandleTypeDef hadc1;
|
||||
extern DMA_HandleTypeDef hdma_i2c1_rx;
|
||||
extern DMA_HandleTypeDef hdma_i2c1_tx;
|
||||
extern I2C_HandleTypeDef hi2c1;
|
||||
extern DMA_HandleTypeDef hdma_sdmmc1_rx;
|
||||
extern DMA_HandleTypeDef hdma_sdmmc1_tx;
|
||||
extern DMA_HandleTypeDef hdma_sdmmc1;
|
||||
extern SD_HandleTypeDef hsd1;
|
||||
extern SPI_HandleTypeDef hspi1;
|
||||
extern TIM_HandleTypeDef htim6;
|
||||
@@ -222,20 +223,6 @@ void EXTI0_IRQHandler(void)
|
||||
/* USER CODE END EXTI0_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles EXTI line3 interrupt.
|
||||
*/
|
||||
void EXTI3_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN EXTI3_IRQn 0 */
|
||||
|
||||
/* USER CODE END EXTI3_IRQn 0 */
|
||||
HAL_GPIO_EXTI_IRQHandler(IMU_DRDY_Pin);
|
||||
/* USER CODE BEGIN EXTI3_IRQn 1 */
|
||||
|
||||
/* USER CODE END EXTI3_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles DMA1 channel4 global interrupt.
|
||||
*/
|
||||
@@ -264,6 +251,34 @@ void DMA1_Channel5_IRQHandler(void)
|
||||
/* USER CODE END DMA1_Channel5_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles DMA1 channel6 global interrupt.
|
||||
*/
|
||||
void DMA1_Channel6_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN DMA1_Channel6_IRQn 0 */
|
||||
|
||||
/* USER CODE END DMA1_Channel6_IRQn 0 */
|
||||
HAL_DMA_IRQHandler(&hdma_i2c1_tx);
|
||||
/* USER CODE BEGIN DMA1_Channel6_IRQn 1 */
|
||||
|
||||
/* USER CODE END DMA1_Channel6_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles DMA1 channel7 global interrupt.
|
||||
*/
|
||||
void DMA1_Channel7_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN DMA1_Channel7_IRQn 0 */
|
||||
|
||||
/* USER CODE END DMA1_Channel7_IRQn 0 */
|
||||
HAL_DMA_IRQHandler(&hdma_i2c1_rx);
|
||||
/* USER CODE BEGIN DMA1_Channel7_IRQn 1 */
|
||||
|
||||
/* USER CODE END DMA1_Channel7_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles ADC1 global interrupt.
|
||||
*/
|
||||
@@ -287,7 +302,6 @@ void EXTI9_5_IRQHandler(void)
|
||||
|
||||
/* USER CODE END EXTI9_5_IRQn 0 */
|
||||
HAL_GPIO_EXTI_IRQHandler(ADC_DRDY_Pin);
|
||||
HAL_GPIO_EXTI_IRQHandler(PPG_DRDY_Pin);
|
||||
/* USER CODE BEGIN EXTI9_5_IRQn 1 */
|
||||
|
||||
/* USER CODE END EXTI9_5_IRQn 1 */
|
||||
@@ -371,26 +385,12 @@ void DMA2_Channel4_IRQHandler(void)
|
||||
/* USER CODE BEGIN DMA2_Channel4_IRQn 0 */
|
||||
|
||||
/* USER CODE END DMA2_Channel4_IRQn 0 */
|
||||
HAL_DMA_IRQHandler(&hdma_sdmmc1_rx);
|
||||
HAL_DMA_IRQHandler(&hdma_sdmmc1);
|
||||
/* USER CODE BEGIN DMA2_Channel4_IRQn 1 */
|
||||
|
||||
/* USER CODE END DMA2_Channel4_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles DMA2 channel5 global interrupt.
|
||||
*/
|
||||
void DMA2_Channel5_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN DMA2_Channel5_IRQn 0 */
|
||||
|
||||
/* USER CODE END DMA2_Channel5_IRQn 0 */
|
||||
HAL_DMA_IRQHandler(&hdma_sdmmc1_tx);
|
||||
/* USER CODE BEGIN DMA2_Channel5_IRQn 1 */
|
||||
|
||||
/* USER CODE END DMA2_Channel5_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles USB event interrupt through EXTI line 17.
|
||||
*/
|
||||
|
||||
@@ -37,18 +37,6 @@ void MX_FATFS_Init(void)
|
||||
/* USER CODE END Init */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Gets Time from RTC
|
||||
* @param None
|
||||
* @retval Time in DWORD
|
||||
*/
|
||||
DWORD get_fattime(void)
|
||||
{
|
||||
/* USER CODE BEGIN get_fattime */
|
||||
return 0;
|
||||
/* USER CODE END get_fattime */
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN Application */
|
||||
|
||||
/* USER CODE END Application */
|
||||
|
||||
@@ -214,7 +214,7 @@
|
||||
/ When enable exFAT, also LFN needs to be enabled. (_USE_LFN >= 1)
|
||||
/ Note that enabling exFAT discards C89 compatibility. */
|
||||
|
||||
#define _FS_NORTC 0
|
||||
#define _FS_NORTC 1
|
||||
#define _NORTC_MON 6
|
||||
#define _NORTC_MDAY 4
|
||||
#define _NORTC_YEAR 2015
|
||||
|
||||
@@ -17,8 +17,8 @@
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Note: code generation based on sd_diskio_dma_template_bspv1.c v2.1.4
|
||||
as "Use dma template" is enabled. */
|
||||
/* Note: code generation based on sd_diskio_template_bspv1.c v2.1.4
|
||||
as "Use dma template" is disabled. */
|
||||
|
||||
/* USER CODE BEGIN firstSection */
|
||||
/* can be used to modify / undefine following code or add new definitions */
|
||||
@@ -28,17 +28,16 @@
|
||||
#include "ff_gen_drv.h"
|
||||
#include "sd_diskio.h"
|
||||
|
||||
#include <string.h>
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* the following Timeout is useful to give the control back to the applications
|
||||
* in case of errors in either BSP_SD_ReadCpltCallback() or BSP_SD_WriteCpltCallback()
|
||||
* the value by default is as defined in the BSP platform driver otherwise 30 secs
|
||||
*/
|
||||
/* use the default SD timout as defined in the platform BSP driver*/
|
||||
#if defined(SDMMC_DATATIMEOUT)
|
||||
#define SD_TIMEOUT SDMMC_DATATIMEOUT
|
||||
#elif defined(SD_DATATIMEOUT)
|
||||
#define SD_TIMEOUT SD_DATATIMEOUT
|
||||
#else
|
||||
#define SD_TIMEOUT 30 * 1000
|
||||
#endif
|
||||
|
||||
#define SD_DEFAULT_BLOCK_SIZE 512
|
||||
|
||||
@@ -52,37 +51,10 @@
|
||||
/* #define DISABLE_SD_INIT */
|
||||
/* USER CODE END disableSDInit */
|
||||
|
||||
/*
|
||||
* when using cacheable memory region, it may be needed to maintain the cache
|
||||
* validity. Enable the define below to activate a cache maintenance at each
|
||||
* read and write operation.
|
||||
* Notice: This is applicable only for cortex M7 based platform.
|
||||
*/
|
||||
/* USER CODE BEGIN enableSDDmaCacheMaintenance */
|
||||
/* #define ENABLE_SD_DMA_CACHE_MAINTENANCE 1 */
|
||||
/* USER CODE END enableSDDmaCacheMaintenance */
|
||||
|
||||
/*
|
||||
* Some DMA requires 4-Byte aligned address buffer to correctly read/write data,
|
||||
* in FatFs some accesses aren't thus we need a 4-byte aligned scratch buffer to correctly
|
||||
* transfer data
|
||||
*/
|
||||
/* USER CODE BEGIN enableScratchBuffer */
|
||||
/* #define ENABLE_SCRATCH_BUFFER */
|
||||
/* USER CODE END enableScratchBuffer */
|
||||
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
#if defined(ENABLE_SCRATCH_BUFFER)
|
||||
#if defined (ENABLE_SD_DMA_CACHE_MAINTENANCE)
|
||||
ALIGN_32BYTES(static uint8_t scratch[BLOCKSIZE]); // 32-Byte aligned for cache maintenance
|
||||
#else
|
||||
__ALIGN_BEGIN static uint8_t scratch[BLOCKSIZE] __ALIGN_END;
|
||||
#endif
|
||||
#endif
|
||||
/* Disk status */
|
||||
static volatile DSTATUS Stat = STA_NOINIT;
|
||||
|
||||
static volatile UINT WriteStatus = 0, ReadStatus = 0;
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
static DSTATUS SD_CheckStatus(BYTE lun);
|
||||
DSTATUS SD_initialize (BYTE);
|
||||
@@ -115,21 +87,6 @@ const Diskio_drvTypeDef SD_Driver =
|
||||
|
||||
/* Private functions ---------------------------------------------------------*/
|
||||
|
||||
static int SD_CheckStatusWithTimeout(uint32_t timeout)
|
||||
{
|
||||
uint32_t timer = HAL_GetTick();
|
||||
/* block until SDIO IP is ready again or a timeout occur */
|
||||
while(HAL_GetTick() - timer < timeout)
|
||||
{
|
||||
if (BSP_SD_GetCardState() == SD_TRANSFER_OK)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
static DSTATUS SD_CheckStatus(BYTE lun)
|
||||
{
|
||||
Stat = STA_NOINIT;
|
||||
@@ -149,6 +106,7 @@ static DSTATUS SD_CheckStatus(BYTE lun)
|
||||
*/
|
||||
DSTATUS SD_initialize(BYTE lun)
|
||||
{
|
||||
Stat = STA_NOINIT;
|
||||
|
||||
#if !defined(DISABLE_SD_INIT)
|
||||
|
||||
@@ -189,108 +147,17 @@ DSTATUS SD_status(BYTE lun)
|
||||
DRESULT SD_read(BYTE lun, BYTE *buff, DWORD sector, UINT count)
|
||||
{
|
||||
DRESULT res = RES_ERROR;
|
||||
uint32_t timeout;
|
||||
#if defined(ENABLE_SCRATCH_BUFFER)
|
||||
uint8_t ret;
|
||||
#endif
|
||||
#if (ENABLE_SD_DMA_CACHE_MAINTENANCE == 1)
|
||||
uint32_t alignedAddr;
|
||||
#endif
|
||||
|
||||
/*
|
||||
* ensure the SDCard is ready for a new operation
|
||||
*/
|
||||
|
||||
if (SD_CheckStatusWithTimeout(SD_TIMEOUT) < 0)
|
||||
if(BSP_SD_ReadBlocks((uint32_t*)buff,
|
||||
(uint32_t) (sector),
|
||||
count, SD_TIMEOUT) == MSD_OK)
|
||||
{
|
||||
return res;
|
||||
}
|
||||
|
||||
#if defined(ENABLE_SCRATCH_BUFFER)
|
||||
if (!((uint32_t)buff & 0x3))
|
||||
{
|
||||
#endif
|
||||
if(BSP_SD_ReadBlocks_DMA((uint32_t*)buff,
|
||||
(uint32_t) (sector),
|
||||
count) == MSD_OK)
|
||||
/* wait until the read operation is finished */
|
||||
while(BSP_SD_GetCardState()!= MSD_OK)
|
||||
{
|
||||
ReadStatus = 0;
|
||||
/* Wait that the reading process is completed or a timeout occurs */
|
||||
timeout = HAL_GetTick();
|
||||
while((ReadStatus == 0) && ((HAL_GetTick() - timeout) < SD_TIMEOUT))
|
||||
{
|
||||
}
|
||||
/* in case of a timeout return error */
|
||||
if (ReadStatus == 0)
|
||||
{
|
||||
res = RES_ERROR;
|
||||
}
|
||||
else
|
||||
{
|
||||
ReadStatus = 0;
|
||||
timeout = HAL_GetTick();
|
||||
|
||||
while((HAL_GetTick() - timeout) < SD_TIMEOUT)
|
||||
{
|
||||
if (BSP_SD_GetCardState() == SD_TRANSFER_OK)
|
||||
{
|
||||
res = RES_OK;
|
||||
#if (ENABLE_SD_DMA_CACHE_MAINTENANCE == 1)
|
||||
/*
|
||||
the SCB_InvalidateDCache_by_Addr() requires a 32-Byte aligned address,
|
||||
adjust the address and the D-Cache size to invalidate accordingly.
|
||||
*/
|
||||
alignedAddr = (uint32_t)buff & ~0x1F;
|
||||
SCB_InvalidateDCache_by_Addr((uint32_t*)alignedAddr, count*BLOCKSIZE + ((uint32_t)buff - alignedAddr));
|
||||
#endif
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
#if defined(ENABLE_SCRATCH_BUFFER)
|
||||
res = RES_OK;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Slow path, fetch each sector a part and memcpy to destination buffer */
|
||||
int i;
|
||||
|
||||
for (i = 0; i < count; i++) {
|
||||
ret = BSP_SD_ReadBlocks_DMA((uint32_t*)scratch, (uint32_t)sector++, 1);
|
||||
if (ret == MSD_OK) {
|
||||
/* wait until the read is successful or a timeout occurs */
|
||||
|
||||
timeout = HAL_GetTick();
|
||||
while((ReadStatus == 0) && ((HAL_GetTick() - timeout) < SD_TIMEOUT))
|
||||
{
|
||||
}
|
||||
if (ReadStatus == 0)
|
||||
{
|
||||
res = RES_ERROR;
|
||||
break;
|
||||
}
|
||||
ReadStatus = 0;
|
||||
|
||||
#if (ENABLE_SD_DMA_CACHE_MAINTENANCE == 1)
|
||||
/*
|
||||
*
|
||||
* invalidate the scratch buffer before the next read to get the actual data instead of the cached one
|
||||
*/
|
||||
SCB_InvalidateDCache_by_Addr((uint32_t*)scratch, BLOCKSIZE);
|
||||
#endif
|
||||
memcpy(buff, scratch, BLOCKSIZE);
|
||||
buff += BLOCKSIZE;
|
||||
}
|
||||
else
|
||||
{
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if ((i == count) && (ret == MSD_OK))
|
||||
res = RES_OK;
|
||||
}
|
||||
#endif
|
||||
|
||||
return res;
|
||||
}
|
||||
@@ -311,107 +178,18 @@ DRESULT SD_read(BYTE lun, BYTE *buff, DWORD sector, UINT count)
|
||||
DRESULT SD_write(BYTE lun, const BYTE *buff, DWORD sector, UINT count)
|
||||
{
|
||||
DRESULT res = RES_ERROR;
|
||||
uint32_t timeout;
|
||||
#if defined(ENABLE_SCRATCH_BUFFER)
|
||||
uint8_t ret;
|
||||
int i;
|
||||
#endif
|
||||
|
||||
WriteStatus = 0;
|
||||
#if (ENABLE_SD_DMA_CACHE_MAINTENANCE == 1)
|
||||
uint32_t alignedAddr;
|
||||
#endif
|
||||
|
||||
if (SD_CheckStatusWithTimeout(SD_TIMEOUT) < 0)
|
||||
if(BSP_SD_WriteBlocks((uint32_t*)buff,
|
||||
(uint32_t)(sector),
|
||||
count, SD_TIMEOUT) == MSD_OK)
|
||||
{
|
||||
return res;
|
||||
/* wait until the Write operation is finished */
|
||||
while(BSP_SD_GetCardState() != MSD_OK)
|
||||
{
|
||||
}
|
||||
res = RES_OK;
|
||||
}
|
||||
|
||||
#if defined(ENABLE_SCRATCH_BUFFER)
|
||||
if (!((uint32_t)buff & 0x3))
|
||||
{
|
||||
#endif
|
||||
#if (ENABLE_SD_DMA_CACHE_MAINTENANCE == 1)
|
||||
|
||||
/*
|
||||
the SCB_CleanDCache_by_Addr() requires a 32-Byte aligned address
|
||||
adjust the address and the D-Cache size to clean accordingly.
|
||||
*/
|
||||
alignedAddr = (uint32_t)buff & ~0x1F;
|
||||
SCB_CleanDCache_by_Addr((uint32_t*)alignedAddr, count*BLOCKSIZE + ((uint32_t)buff - alignedAddr));
|
||||
#endif
|
||||
|
||||
if(BSP_SD_WriteBlocks_DMA((uint32_t*)buff,
|
||||
(uint32_t)(sector),
|
||||
count) == MSD_OK)
|
||||
{
|
||||
/* Wait that writing process is completed or a timeout occurs */
|
||||
|
||||
timeout = HAL_GetTick();
|
||||
while((WriteStatus == 0) && ((HAL_GetTick() - timeout) < SD_TIMEOUT))
|
||||
{
|
||||
}
|
||||
/* in case of a timeout return error */
|
||||
if (WriteStatus == 0)
|
||||
{
|
||||
res = RES_ERROR;
|
||||
}
|
||||
else
|
||||
{
|
||||
WriteStatus = 0;
|
||||
timeout = HAL_GetTick();
|
||||
|
||||
while((HAL_GetTick() - timeout) < SD_TIMEOUT)
|
||||
{
|
||||
if (BSP_SD_GetCardState() == SD_TRANSFER_OK)
|
||||
{
|
||||
res = RES_OK;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
#if defined(ENABLE_SCRATCH_BUFFER)
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Slow path, fetch each sector a part and memcpy to destination buffer */
|
||||
#if (ENABLE_SD_DMA_CACHE_MAINTENANCE == 1)
|
||||
/*
|
||||
* invalidate the scratch buffer before the next write to get the actual data instead of the cached one
|
||||
*/
|
||||
SCB_InvalidateDCache_by_Addr((uint32_t*)scratch, BLOCKSIZE);
|
||||
#endif
|
||||
|
||||
for (i = 0; i < count; i++)
|
||||
{
|
||||
WriteStatus = 0;
|
||||
|
||||
memcpy((void *)scratch, (void *)buff, BLOCKSIZE);
|
||||
buff += BLOCKSIZE;
|
||||
|
||||
ret = BSP_SD_WriteBlocks_DMA((uint32_t*)scratch, (uint32_t)sector++, 1);
|
||||
if (ret == MSD_OK) {
|
||||
/* wait for a message from the queue or a timeout */
|
||||
timeout = HAL_GetTick();
|
||||
while((WriteStatus == 0) && ((HAL_GetTick() - timeout) < SD_TIMEOUT))
|
||||
{
|
||||
}
|
||||
if (WriteStatus == 0)
|
||||
{
|
||||
break;
|
||||
}
|
||||
|
||||
}
|
||||
else
|
||||
{
|
||||
break;
|
||||
}
|
||||
}
|
||||
if ((i == count) && (ret == MSD_OK))
|
||||
res = RES_OK;
|
||||
}
|
||||
#endif
|
||||
return res;
|
||||
}
|
||||
#endif /* _USE_WRITE == 1 */
|
||||
@@ -474,46 +252,6 @@ DRESULT SD_ioctl(BYTE lun, BYTE cmd, void *buff)
|
||||
/* can be used to modify previous code / undefine following code / add new code */
|
||||
/* USER CODE END afterIoctlSection */
|
||||
|
||||
/* USER CODE BEGIN callbackSection */
|
||||
/* can be used to modify / following code or add new code */
|
||||
/* USER CODE END callbackSection */
|
||||
/**
|
||||
* @brief Tx Transfer completed callbacks
|
||||
* @param hsd: SD handle
|
||||
* @retval None
|
||||
*/
|
||||
void BSP_SD_WriteCpltCallback(void)
|
||||
{
|
||||
|
||||
WriteStatus = 1;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Rx Transfer completed callbacks
|
||||
* @param hsd: SD handle
|
||||
* @retval None
|
||||
*/
|
||||
void BSP_SD_ReadCpltCallback(void)
|
||||
{
|
||||
ReadStatus = 1;
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN ErrorAbortCallbacks */
|
||||
/*
|
||||
==============================================================================================
|
||||
depending on the SD_HAL_Driver version, either the HAL_SD_ErrorCallback() or HAL_SD_AbortCallback()
|
||||
or both could be defined, activate the callbacks below when suitable and needed
|
||||
==============================================================================================
|
||||
void BSP_SD_AbortCallback(void)
|
||||
{
|
||||
}
|
||||
|
||||
void BSP_SD_ErrorCallback(void)
|
||||
{
|
||||
}
|
||||
*/
|
||||
/* USER CODE END ErrorAbortCallbacks */
|
||||
|
||||
/* USER CODE BEGIN lastSection */
|
||||
/* can be used to modify / undefine previous code or add new code */
|
||||
/* USER CODE END lastSection */
|
||||
|
||||
@@ -17,7 +17,7 @@
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Note: code generation based on sd_diskio_dma_template.h */
|
||||
/* Note: code generation based on sd_diskio_template.h */
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __SD_DISKIO_H
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
##########################################################################################################################
|
||||
# File automatically-generated by tool: [projectgenerator] version: [4.9.0-B19] date: [Tue May 05 14:07:50 CDT 2026]
|
||||
# File automatically-generated by tool: [projectgenerator] version: [4.9.0-B19] date: [Thu May 07 13:29:52 CDT 2026]
|
||||
##########################################################################################################################
|
||||
|
||||
# ------------------------------------------------
|
||||
@@ -150,17 +150,17 @@ AS_INCLUDES =
|
||||
# C includes
|
||||
C_INCLUDES = \
|
||||
-ICore/Inc \
|
||||
-IFATFS/Target \
|
||||
-IFATFS/App \
|
||||
-IDrivers/STM32L4xx_HAL_Driver/Inc \
|
||||
-IDrivers/STM32L4xx_HAL_Driver/Inc/Legacy \
|
||||
-IMiddlewares/Third_Party/FatFs/src \
|
||||
-IDrivers/CMSIS/Device/ST/STM32L4xx/Include \
|
||||
-IDrivers/CMSIS/Include \
|
||||
-IUSB_DEVICE/App \
|
||||
-IUSB_DEVICE/Target \
|
||||
-IMiddlewares/ST/STM32_USB_Device_Library/Core/Inc \
|
||||
-IMiddlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc
|
||||
-IMiddlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc \
|
||||
-IFATFS/Target \
|
||||
-IFATFS/App \
|
||||
-IMiddlewares/Third_Party/FatFs/src
|
||||
|
||||
|
||||
# compile gcc flags
|
||||
|
||||
@@ -91,7 +91,7 @@ void HAL_PCD_MspInit(PCD_HandleTypeDef* pcdHandle)
|
||||
__HAL_RCC_USB_CLK_ENABLE();
|
||||
|
||||
/* Peripheral interrupt init */
|
||||
HAL_NVIC_SetPriority(USB_IRQn, 0, 0);
|
||||
HAL_NVIC_SetPriority(USB_IRQn, 7, 0);
|
||||
HAL_NVIC_EnableIRQ(USB_IRQn);
|
||||
/* USER CODE BEGIN USB_MspInit 1 */
|
||||
|
||||
|
||||
@@ -0,0 +1,44 @@
|
||||
import serial
|
||||
import matplotlib.pyplot as plt
|
||||
import numpy as np
|
||||
|
||||
ser = serial.Serial(port='/dev/ttyACM1', timeout = 1)
|
||||
ser.flush()
|
||||
ser.reset_input_buffer()
|
||||
|
||||
gyros = []
|
||||
accs = []
|
||||
|
||||
fig, axs = plt.subplots(2)
|
||||
i = 0
|
||||
|
||||
while(1):
|
||||
x = [int(e, 16) for e in ser.readline()[1:-1].split(b" ")]
|
||||
imu_reading_type = x[0] >> 3
|
||||
imu_reading_tag_cnt = (x[0] >> 1) & 3
|
||||
#print(imu_reading_type, imu_reading_tag_cnt)
|
||||
reading_xyz = [int.from_bytes(x[1:3], byteorder = 'little', signed = True),
|
||||
int.from_bytes(x[3:5], byteorder = 'little', signed = True),
|
||||
int.from_bytes(x[5:7], byteorder = 'little', signed = True)]
|
||||
i += 1
|
||||
if imu_reading_type == 1:
|
||||
gyros.append([250 * e / (1 << 16) for e in reading_xyz])
|
||||
elif imu_reading_type == 2:
|
||||
accs.append([4 * e / (1<<16) for e in reading_xyz])
|
||||
|
||||
if len(gyros) > 50 and (i % 10) == 0:
|
||||
gyros = gyros[-100:]
|
||||
accs = accs[-100:]
|
||||
a = np.array(accs)
|
||||
g = np.array(gyros)
|
||||
a -= np.mean(a, axis = 0).reshape(1, 3)
|
||||
g -= np.mean(g, axis = 0).reshape(1, 3)
|
||||
axs[0].cla()
|
||||
axs[0].plot(g[:,0])
|
||||
axs[0].plot(g[:,1])
|
||||
axs[0].plot(g[:,2])
|
||||
axs[1].cla()
|
||||
axs[1].plot(a[:,0])
|
||||
axs[1].plot(a[:,1])
|
||||
axs[1].plot(a[:,2])
|
||||
plt.pause(0.0001)
|
||||
@@ -10,29 +10,39 @@ ADC1.master=1
|
||||
CAD.formats=
|
||||
CAD.pinconfig=
|
||||
CAD.provider=
|
||||
Dma.I2C1_RX.3.Direction=DMA_PERIPH_TO_MEMORY
|
||||
Dma.I2C1_RX.3.Instance=DMA1_Channel7
|
||||
Dma.I2C1_RX.3.MemDataAlignment=DMA_MDATAALIGN_BYTE
|
||||
Dma.I2C1_RX.3.MemInc=DMA_MINC_ENABLE
|
||||
Dma.I2C1_RX.3.Mode=DMA_NORMAL
|
||||
Dma.I2C1_RX.3.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
|
||||
Dma.I2C1_RX.3.PeriphInc=DMA_PINC_DISABLE
|
||||
Dma.I2C1_RX.3.Priority=DMA_PRIORITY_LOW
|
||||
Dma.I2C1_RX.3.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority
|
||||
Dma.I2C1_TX.4.Direction=DMA_MEMORY_TO_PERIPH
|
||||
Dma.I2C1_TX.4.Instance=DMA1_Channel6
|
||||
Dma.I2C1_TX.4.MemDataAlignment=DMA_MDATAALIGN_BYTE
|
||||
Dma.I2C1_TX.4.MemInc=DMA_MINC_ENABLE
|
||||
Dma.I2C1_TX.4.Mode=DMA_NORMAL
|
||||
Dma.I2C1_TX.4.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
|
||||
Dma.I2C1_TX.4.PeriphInc=DMA_PINC_DISABLE
|
||||
Dma.I2C1_TX.4.Priority=DMA_PRIORITY_LOW
|
||||
Dma.I2C1_TX.4.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority
|
||||
Dma.Request0=USART1_RX
|
||||
Dma.Request1=USART1_TX
|
||||
Dma.Request2=SDMMC1_RX
|
||||
Dma.Request3=SDMMC1_TX
|
||||
Dma.RequestsNb=4
|
||||
Dma.SDMMC1_RX.2.Direction=DMA_PERIPH_TO_MEMORY
|
||||
Dma.SDMMC1_RX.2.Instance=DMA2_Channel4
|
||||
Dma.SDMMC1_RX.2.MemDataAlignment=DMA_MDATAALIGN_WORD
|
||||
Dma.SDMMC1_RX.2.MemInc=DMA_MINC_ENABLE
|
||||
Dma.SDMMC1_RX.2.Mode=DMA_NORMAL
|
||||
Dma.SDMMC1_RX.2.PeriphDataAlignment=DMA_PDATAALIGN_WORD
|
||||
Dma.SDMMC1_RX.2.PeriphInc=DMA_PINC_DISABLE
|
||||
Dma.SDMMC1_RX.2.Priority=DMA_PRIORITY_LOW
|
||||
Dma.SDMMC1_RX.2.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority
|
||||
Dma.SDMMC1_TX.3.Direction=DMA_MEMORY_TO_PERIPH
|
||||
Dma.SDMMC1_TX.3.Instance=DMA2_Channel5
|
||||
Dma.SDMMC1_TX.3.MemDataAlignment=DMA_MDATAALIGN_WORD
|
||||
Dma.SDMMC1_TX.3.MemInc=DMA_MINC_ENABLE
|
||||
Dma.SDMMC1_TX.3.Mode=DMA_NORMAL
|
||||
Dma.SDMMC1_TX.3.PeriphDataAlignment=DMA_PDATAALIGN_WORD
|
||||
Dma.SDMMC1_TX.3.PeriphInc=DMA_PINC_DISABLE
|
||||
Dma.SDMMC1_TX.3.Priority=DMA_PRIORITY_LOW
|
||||
Dma.SDMMC1_TX.3.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority
|
||||
Dma.Request2=SDMMC1
|
||||
Dma.Request3=I2C1_RX
|
||||
Dma.Request4=I2C1_TX
|
||||
Dma.RequestsNb=5
|
||||
Dma.SDMMC1.2.Direction=DMA_PERIPH_TO_MEMORY
|
||||
Dma.SDMMC1.2.Instance=DMA2_Channel4
|
||||
Dma.SDMMC1.2.MemDataAlignment=DMA_MDATAALIGN_WORD
|
||||
Dma.SDMMC1.2.MemInc=DMA_MINC_ENABLE
|
||||
Dma.SDMMC1.2.Mode=DMA_NORMAL
|
||||
Dma.SDMMC1.2.PeriphDataAlignment=DMA_PDATAALIGN_WORD
|
||||
Dma.SDMMC1.2.PeriphInc=DMA_PINC_DISABLE
|
||||
Dma.SDMMC1.2.Priority=DMA_PRIORITY_LOW
|
||||
Dma.SDMMC1.2.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority
|
||||
Dma.USART1_RX.0.Direction=DMA_PERIPH_TO_MEMORY
|
||||
Dma.USART1_RX.0.Instance=DMA1_Channel5
|
||||
Dma.USART1_RX.0.MemDataAlignment=DMA_MDATAALIGN_BYTE
|
||||
@@ -52,8 +62,11 @@ Dma.USART1_TX.1.PeriphInc=DMA_PINC_DISABLE
|
||||
Dma.USART1_TX.1.Priority=DMA_PRIORITY_LOW
|
||||
Dma.USART1_TX.1.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority
|
||||
FATFS.BSP.number=1
|
||||
FATFS.IPParameters=USE_DMA_CODE_SD
|
||||
FATFS.USE_DMA_CODE_SD=1
|
||||
FATFS.IPParameters=USE_DMA_CODE_SD,_USE_LFN,_MAX_SS,_FS_NORTC
|
||||
FATFS.USE_DMA_CODE_SD=0
|
||||
FATFS._FS_NORTC=1
|
||||
FATFS._MAX_SS=512
|
||||
FATFS._USE_LFN=0
|
||||
FATFS0.BSP.STBoard=false
|
||||
FATFS0.BSP.api=Unknown
|
||||
FATFS0.BSP.component=
|
||||
@@ -66,8 +79,9 @@ FATFS0.BSP.semaphore=
|
||||
FATFS0.BSP.solution=PA15 (JTDI)
|
||||
File.Version=6
|
||||
GPIO.groupedBy=Group By Peripherals
|
||||
I2C1.IPParameters=Timing
|
||||
I2C1.Timing=0x10D19CE4
|
||||
I2C1.I2C_Speed_Mode=I2C_Fast
|
||||
I2C1.IPParameters=Timing,I2C_Speed_Mode
|
||||
I2C1.Timing=0x00F12981
|
||||
KeepUserPlacement=false
|
||||
Mcu.CPN=STM32L452RET3
|
||||
Mcu.Family=STM32L4
|
||||
@@ -136,11 +150,11 @@ NVIC.ADC1_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
|
||||
NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
||||
NVIC.DMA1_Channel4_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true
|
||||
NVIC.DMA1_Channel5_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true
|
||||
NVIC.DMA1_Channel6_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true
|
||||
NVIC.DMA1_Channel7_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true
|
||||
NVIC.DMA2_Channel4_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true
|
||||
NVIC.DMA2_Channel5_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true
|
||||
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
||||
NVIC.EXTI0_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
|
||||
NVIC.EXTI3_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
|
||||
NVIC.EXTI9_5_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
|
||||
NVIC.ForceEnableDMAVector=true
|
||||
NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
||||
@@ -155,7 +169,7 @@ NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
||||
NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:true\:false\:true\:false
|
||||
NVIC.TIM6_DAC_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
|
||||
NVIC.USART1_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
|
||||
NVIC.USB_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true
|
||||
NVIC.USB_IRQn=true\:7\:0\:true\:false\:true\:false\:true\:true
|
||||
NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
||||
PA0.GPIOParameters=GPIO_Label
|
||||
PA0.GPIO_Label=CLKIN_ADC
|
||||
@@ -229,10 +243,11 @@ PC11.Mode=SD_4_bits_Wide_bus
|
||||
PC11.Signal=SDMMC1_D3
|
||||
PC12.Mode=SD_4_bits_Wide_bus
|
||||
PC12.Signal=SDMMC1_CK
|
||||
PC3.GPIOParameters=GPIO_Label
|
||||
PC3.GPIOParameters=GPIO_PuPd,GPIO_Label
|
||||
PC3.GPIO_Label=IMU_DRDY
|
||||
PC3.GPIO_PuPd=GPIO_NOPULL
|
||||
PC3.Locked=true
|
||||
PC3.Signal=GPXTI3
|
||||
PC3.Signal=GPIO_Input
|
||||
PC4.GPIOParameters=PinState,GPIO_Label
|
||||
PC4.GPIO_Label=IMU_CS
|
||||
PC4.Locked=true
|
||||
@@ -242,10 +257,11 @@ PC5.GPIOParameters=GPIO_Label
|
||||
PC5.GPIO_Label=BUTTON2
|
||||
PC5.Locked=true
|
||||
PC5.Signal=GPIO_Input
|
||||
PC7.GPIOParameters=GPIO_Label
|
||||
PC7.GPIOParameters=GPIO_PuPd,GPIO_Label
|
||||
PC7.GPIO_Label=PPG_DRDY
|
||||
PC7.GPIO_PuPd=GPIO_PULLUP
|
||||
PC7.Locked=true
|
||||
PC7.Signal=GPXTI7
|
||||
PC7.Signal=GPIO_Input
|
||||
PC8.Mode=SD_4_bits_Wide_bus
|
||||
PC8.Signal=SDMMC1_D0
|
||||
PC9.Mode=SD_4_bits_Wide_bus
|
||||
@@ -285,7 +301,7 @@ ProjectManager.ToolChainLocation=
|
||||
ProjectManager.UAScriptAfterPath=
|
||||
ProjectManager.UAScriptBeforePath=
|
||||
ProjectManager.UnderRoot=false
|
||||
ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_DMA_Init-DMA-false-HAL-true,4-MX_SDMMC1_SD_Init-SDMMC1-false-HAL-true,5-MX_FATFS_Init-FATFS-false-HAL-false,6-MX_RTC_Init-RTC-false-HAL-true,7-MX_I2C1_Init-I2C1-false-HAL-true,8-MX_SPI1_Init-SPI1-false-HAL-true,9-MX_ADC1_Init-ADC1-false-HAL-true,10-MX_TIM2_Init-TIM2-false-HAL-true,11-MX_USART1_UART_Init-USART1-false-HAL-true,12-MX_TIM6_Init-TIM6-false-HAL-true,13-MX_USB_DEVICE_Init-USB_DEVICE-false-HAL-false
|
||||
ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_DMA_Init-DMA-false-HAL-true,4-MX_SDMMC1_SD_Init-SDMMC1-false-HAL-true,5-MX_RTC_Init-RTC-false-HAL-true,6-MX_I2C1_Init-I2C1-false-HAL-true,7-MX_SPI1_Init-SPI1-false-HAL-true,8-MX_ADC1_Init-ADC1-false-HAL-true,9-MX_TIM2_Init-TIM2-false-HAL-true,10-MX_USART1_UART_Init-USART1-false-HAL-true,11-MX_TIM6_Init-TIM6-false-HAL-true,12-MX_USB_DEVICE_Init-USB_DEVICE-false-HAL-false,13-MX_FATFS_Init-FATFS-false-HAL-false
|
||||
RCC.ADCFreq_Value=48000000
|
||||
RCC.AHBFreq_Value=80000000
|
||||
RCC.APB1Freq_Value=80000000
|
||||
@@ -335,21 +351,20 @@ RCC.USBFreq_Value=48000000
|
||||
RCC.VCOInputFreq_Value=4000000
|
||||
RCC.VCOOutputFreq_Value=160000000
|
||||
RCC.VCOSAI1OutputFreq_Value=96000000
|
||||
SDMMC1.ClockDiv=6
|
||||
SDMMC1.ClockEdge=SDMMC_CLOCK_EDGE_RISING
|
||||
SDMMC1.IPParameters=ClockDiv,ClockEdge
|
||||
SH.ADCx_IN16.0=ADC1_IN16,IN16-Single-Ended
|
||||
SH.ADCx_IN16.ConfNb=1
|
||||
SH.GPXTI0.0=GPIO_EXTI0
|
||||
SH.GPXTI0.ConfNb=1
|
||||
SH.GPXTI3.0=GPIO_EXTI3
|
||||
SH.GPXTI3.ConfNb=1
|
||||
SH.GPXTI5.0=GPIO_EXTI5
|
||||
SH.GPXTI5.ConfNb=1
|
||||
SH.GPXTI7.0=GPIO_EXTI7
|
||||
SH.GPXTI7.ConfNb=1
|
||||
SH.S_TIM2_ETR.0=TIM2_ETR,ClockSourceETR_Mode2
|
||||
SH.S_TIM2_ETR.ConfNb=1
|
||||
SPI1.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_128
|
||||
SPI1.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_64
|
||||
SPI1.CLKPhase=SPI_PHASE_2EDGE
|
||||
SPI1.CalculateBaudRate=625.0 KBits/s
|
||||
SPI1.CalculateBaudRate=1.25 MBits/s
|
||||
SPI1.DataSize=SPI_DATASIZE_8BIT
|
||||
SPI1.Direction=SPI_DIRECTION_2LINES
|
||||
SPI1.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate,DataSize,BaudRatePrescaler,CLKPhase
|
||||
|
||||
@@ -4,7 +4,6 @@ from scipy import signal
|
||||
import time
|
||||
import serial
|
||||
|
||||
|
||||
ser = serial.Serial(port = '/dev/ttyACM1', timeout = 10.0)
|
||||
ser.reset_input_buffer()
|
||||
start = time.time()
|
||||
|
||||
@@ -0,0 +1,38 @@
|
||||
import serial
|
||||
import numpy as np
|
||||
import matplotlib.pyplot as plt
|
||||
import time
|
||||
|
||||
ser = serial.Serial(port = '/dev/ttyACM1', timeout = 10.0)
|
||||
ser.reset_input_buffer()
|
||||
ser.flush()
|
||||
|
||||
|
||||
D = np.zeros((0,3))
|
||||
|
||||
fig, axs = plt.subplots(3)
|
||||
|
||||
counter = 0
|
||||
start = time.time()
|
||||
while(1):
|
||||
ser.write(b"R")
|
||||
read_data = ser.read(180)
|
||||
counter += 1
|
||||
p = np.array([int.from_bytes(read_data[3 * i : 3 * i + 3], byteorder = 'big') for i in range(60)]).reshape(20,3)
|
||||
D = np.concatenate((D, p))
|
||||
|
||||
if counter == 30:
|
||||
print(15 * 30 / (time.time() - start))
|
||||
start = time.time()
|
||||
counter = 0
|
||||
|
||||
if D.shape[0] > 400:
|
||||
D = D[-400:,:]
|
||||
|
||||
axs[0].cla()
|
||||
axs[0].plot(D[:,0])
|
||||
axs[1].cla()
|
||||
axs[1].plot(D[:,1])
|
||||
axs[2].cla()
|
||||
axs[2].plot(D[:,2])
|
||||
plt.pause(0.00001)
|
||||
Reference in New Issue
Block a user